DS1921G
Thermochron iButton Device
minute). Since all mission samples occur on the sec-
onds rollover (59 to 00), memory conflicts can be avoid-
ed by first reading the RTC seconds counter. For
example, if it takes 2s to read the data log, then avoid
starting the memory read if the seconds counter is 58,
59, or 00. Alternatively, one can read the affected mem-
ory section twice and accept the data only if both read-
ings match. In any case, when writing driver software, it
is important to know about the possibility of interference
and to take measures to work around it.
1-Wire Bus System
The 1-Wire bus is a system that has a single bus master
and one or more slaves. In all instances the DS1921G
is a slave device. The bus master is typically a micro-
controller. The discussion of this bus system is broken
down into three topics: hardware configuration, trans-
action sequence, and 1-Wire signaling (signal types
and timing). The 1-Wire protocol defines bus transac-
tions in terms of the bus state during specific time slots
that are initiated on the falling edge of sync pulses from
the bus master.
Hardware Configuration
The 1-Wire bus has only a single line by definition; it is
important that each device on the bus be able to drive
it at the appropriate time. To facilitate this, each device
attached to the 1-Wire bus must have open-drain or
three-state outputs. The 1-Wire port of the DS1921G is
open drain with an internal circuit equivalent to that
shown in Figure 12.
A multidrop bus consists of a 1-Wire bus with multiple
slaves attached. At standard speed the 1-Wire bus has
V PUP
BUS MASTER
R PUP
a maximum data rate of 16.3kbps. The speed can be
boosted to 142kbps by activating the overdrive mode.
The DS1921G is not guaranteed to be fully compliant to
the iButton device standard. Its maximum data rate in
standard speed is 15.4kbps and 125kbps in overdrive.
The value of the pullup resistor primarily depends on
the network size and load conditions. The DS1921G
requires a pullup resistor of maximum 2.2k Ω at any
speed.
The idle state for the 1-Wire bus is high. If for any rea-
son a transaction needs to be suspended, the bus
must be left in the idle state if the transaction is to
resume. If this does not occur and the bus is left low for
more than 16μs (overdrive speed) or more than 120μs
(standard speed), one or more devices on the bus may
be reset. Note that the DS1921G does not quite meet
the full 16μs maximum low time of the normal 1-Wire
bus overdrive timing. With the DS1921G the bus must
be left low for no longer than 15μs at overdrive speed to
ensure that no DS1921G on the 1-Wire bus performs a
reset. The DS1921G communicates properly when
used in conjunction with a DS2480B or DS2490 1-Wire
driver and adapters that are based on these driver
chips.
Transaction Sequence
The protocol for accessing the DS1921G through the
1-Wire port is as follows:
? Initialization
? ROM Function Command
? Memory/Control Function Command
? Transaction/Data
DS1921G 1-Wire PORT
Rx
DATA
Rx
Tx
Rx = RECEIVE
I L
Tx
Tx = TRANSMIT
Figure 12. Hardware Configuration
Maxim Integrated
OPEN-DRAIN
PORT PIN
100 Ω MOSFET
27
相关PDF资料
DS1921H-F5# IBUTTON THERMOCHRON F5
DS1921K# KIT IBUTTON THERMOCHRON
DS1922E-F5# IBUTTON TEMP LOGGER 4KBit F5
DS1922L-F5# IBUTTON TEMP LOGGER
DS1923-F5# IBUTTON TEMP/HUMIDITY LOGGER F5
DS1961S-F3# IBUTTON EEPROM 1KBit F3
DS1963S-F5+ IBUTTON MONETARY SHA-1
DS1971-F3+ IBUTTON EEPROM 256KBIT F3
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